OpenROAD is an EDA toolkit for RTL to GDS design flows. It provides all necessary steps from VLSI designs to implement integrated chip physical designs, from RTL design to synthesized Verilog and routed layout. It includes tools for floorplanning, placement, clock tree synthesis, routing, parasitic extraction, and timing analysis.

PySpice implements a Ngspice binding and provides an oriented object API on top of SPICE, the simulation output is converted to Numpy arrays for convenience.

Xoscope is a digital oscilloscope that can acquire signals from ALSA, ESD, and COMEDI sources. This package currently does not include support for ESD or COMEDI sources.

This package provides a library of AST nodes for VHDL, SystemVerilog, and SystemC, with conversion between languages and to JSON.

Forastero is a Python library for writing testbenches with cocotb a Python framework for writing testbenches for hardware designs written in a HDL, taking inspiration from the UVM.

GDSFactory is a Python library for designing chips including photonics, analog, quantum, and MEMS devices. It provides tools for creating, manipulating, and validating designs, outputting industry-standard GDSII and OASIS formats. GDSFactory leverages the KLayout library for high-performance geometry operations.

Verilator is an EDA tool intended to transform the specified Verilog or SystemVerilog HDL code by reading it, performing lint checks, and optionally inserting assertion checks and coverage-analysis points. It outputs single or multi-threaded .cpp and .h files.

Coroutine based cosimulation test bench environment for verifying VHDL and Verilog RTL using Python.

The Dirtywave M8 Tracker is a portable sequencer and synthesizer, featuring 8 tracks of assignable instruments such as FM, waveform synthesis, virtual analog, sample playback, and MIDI output. It is powered by a Teensy micro-controller and inspired by the Gameboy tracker Little Sound DJ. m8c is a client for M8 Headless which allows one to install the M8 firmware on any Teensy.

This package provides CERN's KiCad component libraries, including schematic symbols, footprints, a SQLite-backed database library, and KiCad library tables. The libraries are generated from CERN's Altium Designer libraries.

UHDM is a complete modeling of the IEEE SystemVerilog Object Model with VPI Interface, Elaborator, Serialization, Visitor and Listener.

nextpnr is an EDA, portable and vendor neutral FPGA place and route tool.

This repository contains the official KiCad documentation.

GNUcap is a circuit analysis package used for EDA. It offers a general purpose circuit simulator and can perform DC and transient analyses, fourier analysis and AC analysis. The engine is designed to do true mixed-mode simulation.

Qucsator-rf is a command line driven circuit simulator targeted for RF and microwave circuits. It takes a network list in a certain format as input and outputs an XML dataset.

Lepton is an EDA tool set forked from gEDA/gaf in late 2016. EDA tools are used for electrical circuit design, schematic capture, simulation, prototyping, and production. Lepton EDA includes tools for schematic capture, attribute management, bill of materials (BOM) generation, netlisting into over 20 netlist formats, analog and digital simulation, and PCB layout, and many other features.

This package contains the official KiCad schematic symbol libraries.

Mcy is an EDA tool to help digital designers and project managers understand and improve testbench coverage.

nextpnr is an EDA, portable and vendor neutral FPGA place and route tool.

VSG lets you define a VHDL coding style and provides a command-line tool to enforce it.

LibrePCB is software to develop PCB. It features human readable file formats and complete project management with library, schematic and board editors.

This package provides an extension to cocotb in the form of AXI, AXI lite, and AXI stream modules.

OpenBoardView is a viewer for BoardView files, which present the details of a printed circuit board (PCB). It comes with features such as:

• Dynamic part outline rendering, including complex connectors

• Annotations, for leaving notes about parts, nets, pins or location

• Configurable colour themes

• Configurable DPI to facilitate usage on 4K monitors

• Configurable for running on slower systems

• Reads FZ (with key), BRD, BRD2, BDV and BV* formats.

Fusesoc allows management and reuse of IP cores. It also aids for creating, building and simulating Soc solutions in EDA.